Integrated circuits often include data converters such as analog-to-digital (A/D) converters. An analog-to-digital converter is a device that is configured to convert a continuous (analog) signal to a discrete time digital signal. For example, an analog-to-digital converter can be used to convert an input analog voltage (or current) to a corresponding digital representation that is proportional to the magnitude of the input voltage.
There are many different types of analog-to-digital converters. As examples, the different implementations include flash A/D converters, single-slope A/D converters, dual-slope A/D converters, successive approximation A/D converters, pipeline A/D converters, oversampled A/D converters, etc. A majority of these A/D converters includes some type of comparator circuitry. Comparators are fundamental building blocks of A/D converters. A comparator is a circuit that has a first input that receives a first input signal, a second input that receives a second input signal, an output, and power supply terminals (i.e., terminals on which a positive power supply voltage and a ground power supply voltage are provided). The comparator will drive its output signal high or low depending on whether the first input signal is greater or less than the second input signal. For example, if the first input signal is greater than the second input signal, the comparator will drive the output signal to the positive power supply voltage level (i.e., a logic “1”). If the first input signal is less than the second input signal, the comparator will drive the output signal to the ground power supply voltage level (i.e., a logic “0”).
A comparator can therefore be defined as a high gain amplifier having a differential analog input and a large swing output (i.e., the output signal should be able to swing from the ground power supply voltage all the way up to the positive power supply voltage and vice versa). A conventional comparator is formed using multiple amplifiers cascaded in a chain (i.e., multiple open loop amplifiers connected in series).
It is generally desirable to provide a comparator with high bandwidth. Cascading an increasing number of amplifier stages yields a greater bandwidth for the comparator. Cascading many amplifier stages to increase bandwidth may, however, lower the gain at each amplifier stage. A decrease in the gain of each amplifier stage may undesirably result in the comparator experiencing increased input-referred offset (i.e., the comparator may suffer from inaccuracies when performing comparisons between the first and second input signals). This necessitates the need for offset-cancellation techniques, which requires additional compensation circuitry to be formed on the integrated circuit. Moreover, the use of multiple amplifier stages may consume a substantial amount of power during operation of the integrated circuit.